Hardware Implementation of Embedded Fuzzy Controllers on FPGAs and ASICs - Fuzzy Modeling and Control: Theory and Applications - page 233

Fig. 13.5 xfvhdl GUI. The button 'Generate VHDL code' generates a VHDL description of the
fuzzy systemand a testbench file, also described inVHDL, that allows verifying its functionality. For
FPGA implementations, the button 'Generate and Implement' also launches the Xilinx's synthesis
and implementation tools
The GUI provided by xfvhdl isshowninFig. 13.5 . As happens in the xfsg GUI,
middle area gathers information about the knowledge base (on the left) and the
parameters, membership functions, and fuzzy rules of a particular component (on
the right). In this case, the interface also allows selecting the implementation option
for the antecedents (arithmetic- or memory-based), as well as the kind of memory
(RAM, ROM, or logical block) that will be used in MFC and rule memory blocks
for FPGA implementations. The user can also choose different alternatives related
to some global options, device-specific characteristics, and synthesis tools used for
completing the design process.
For a simple fuzzy controller, xfvhdl output consists basically of two VHDL files
containing, respectively, the description of the fuzzy module and a testbench that
allows verifying its functionality. For hierarchical controllers containing several rule
bases and crisp blocks, a structural VHDL description of the top-level system is
also generated, as well as a testbench that allows verifying the global input-output
behavior. Beside files describing VHDL components, xfvhdl also provides command
files to automate the use of different synthesis and implementation tools for FPGAs
and ASICs.