Information Technology Reference
In-Depth Information
13.5 Model-Based Design Flow for Fuzzy Controllers
The level of complexity reached by current applications of embedded control systems
has motivated the development of new design methodologies that allow accelerating
the development of new products for introduction in the market. The advantage of a
model-based designmethodology is twofold. First, the entire design process is carried
out in a unified framework, which provides facilities for description, verification,
synthesis, and documentation stages. Second, the functionality of the whole system
(made up by the controller and the systemunder control) can be verified by simulating
the behavior of the successive controller representations jointly with a model of
the plant. As illustrated in the flow diagram shown in Fig.
13.6
, the synthesis tools
offered by
Xfuzzy
can be the starting point for a model-based design methodology
for hardware implementation of embedded fuzzy controllers on FPGAs and ASICs.
The first stage of the design flow of a fuzzy controller is carried out using the tools
included in the
Xfuzzy
design environment (Baturone et al.
2007
). Once the high-
level XFL3 specification of the fuzzy controller has been defined and optimized, an
efficient hardware implementation can be obtained following one of the two branches
depicted in Fig.
13.6
. With the help of
xfsg
, the XFL3 specification is translated
into a Simulink model that uses the components included in
XfuzzyLib
. The system
functionality can be verified at this design phase using the simulation and graphical
facilities provided by Simulink and
. Final implementation is performed
by translating the model to different kinds of netlists and generating the bitstream
file for the FPGA. When accomplishing this stage, XSG is also able to include the
appropriated interfaces to perform hardware co-simulation of the complete Simulink
model. This simulationmode allows the combination of the hardware implementation
on an FPGA development board of a part of the system in conjunction with the
mathematical description of the rest of the model.
On the other hand,
xfvhdl
describes the system by a VHDL code that combines
different blocks of the VHDL library. The testbench file provided by this synthesis
tool allows performing logical verification of the VHDL description with the Model-
Sim simulation tool. Conventional VLSI synthesis and implementation tools should
be used in this case to obtain the mask layout required to build the integrated circuit.
AsshowninFig.
13.6
, VHDL descriptions provided by
xfvhdl
can be also included
in a Simulink model using the 'Black Box' block provided by the Xilinx's Blockset
library. XSG also offers facilities for performing HDL co-simulation of these blocks
using the ModelSim or ISIM simulators. This characteristic can be exploited for fast
prototyping of fuzzy controllers previously to their ASIC implementation, as well
as to compare FPGA implementations obtained from both design techniques. The
latter option will be illustrated in next sections, where the results obtained from the
two hardware synthesis tools will be compared in terms of accuracy and resource
consumption.
Matlab
Search WWH ::
Custom Search