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12.1 The VSLI Challenge
The design of VLSI chips represents an enormous intellectual challenge akin to that of con-
structing very large programs. They each involve the assembly of millions of elements, instruc-
tions in the case of software, and electronic components in the case of chips. The design and
implementation of VLSI chips is also challenging because it involves many steps and many
technologies. In this section we provide a brief introduction to this process as preparation
for the introduction of the VLSI models and algorithms that are the principal topics of this
chapter.
12.1.1 Chip Fabrication
A VLSI chip consists of a number of conducting, insulating, and doped layers that are placed
on a semiconductor substrate. (A doped layer is created on the surface of the substrate by
infusing small concentrations of impurities into the semiconductor. This is called doping .)
The layers are created using masks , templates with open regions through which ionizing radi-
ation is projected onto the surface of the semiconductor. The radiation changes the chemical
properties of a previously deposited photosensitive material so that the exposed regions can
be washed away with a solvent. The material that is now exposed can be doped or removed.
Doping is used to create transistors and wires. A removal step is used when a metallic layer has
been previously deposited from which sections are to be removed, leaving wires. A chip may
have several layers of wires separated by layers of insulating material in addition to the doped
layers that form transistors and wires. The layout of a NAND gate is shown schematically in
Fig. 12.1 , in which the shadings of rectangles and annotations identify to a chip designer the
types of materials used to realize the gate.
c
￿
￿
￿
￿
c
V dd
p -well
p -plus
V ss
a
b
a
b
(a)
(b)
Figure 12.1 The schematic layout of a NAND gate and its logical symbol.
 
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