The Architecture of Electronic Data Carriers - RFID: Fundamentals and Applications in Contactless Smart Cards and Identification - page 287

ISO 7816-2

RAM

UART

ROM
(operating system)

CPU

HF
interface
(CIU)

ISO 14443-2

EEPROM
(application data)

Dual interface chip

Figure 10.27 Block diagram of a dual interface card. Both smart card interfaces can be
addressed independently of one another

60mA) available depending upon its specification (Philipp, 2001). This calls for com-
pletely new concepts in the development of contactless microprocessor chips. For
example, the use of a PMU ( power management unit ) on the chip, which can auto-
matically separate inactive circuit parts of the chip from the power supply to save
energy, is recommended. Furthermore, ultra-low-power and low-voltage technology is
used in all dual interface chips so that the available power can be optimally exploited.
An explicit switching between contactless and contact operation on the chip is not
necessary. In the simplest case it is sufficient to use the validity of the data received
via one of the two interfaces as the evaluation criterion for further operation. Some
chips provide the programmer with status flags that allow the currently active operating
mode to be interrogated. Moreover, the signals (frequency, voltage) present at the HF
interface or the chip contacts are evaluated.

10.2.1.1 MIFARE plus

The block diagram in Figure 10.28 shows a very early approach to the dual interface
card. This chip was developed jointly by Philips Semiconductors Gratkorn and Siemens
HL (now Infineon AG) as early as 1997. Since it was not possible using the semicon-
ductor technologies available at the time to reliably operate a microprocessor with the
power available via the contactless interface, an unconventional solution was selected.
At the heart of this chip is an 8 Kbyte EEPROM memory, the Common EEPROM,
in which the application data was stored. In a similar manner to a dual port RAM, this
common EEPROM can be accessed via two interfaces that are completely separate
from each other from the point of view of circuitry. The inactive interface at any time
is completely separated from the power supply of the chip, so that the power available
in contactless operation is used optimally.
The contactless interface is based upon a state machine , which forms a contactless
MIFARE memory card. From the point of view of a contactless reader this dual
interface card thus behaves like a memory card with a segmented EEPROM memory,