The Architecture of Electronic Data Carriers - RFID: Fundamentals and Applications in Contactless Smart Cards and Identification - page 284

Table 10.2 Setting options for the access rights of the
HF interface to individual memory blocks in the bits
RF 0 − RF 7 of the access protection page

MSB LSB Access rights via HF interface

0 0 No access to EEPROM

0 1 No access to EEPROM

1 0 Read access to EEPROM only

1 1 No restrictions

10.2 Microprocessors

Transponders with microprocessors will become increasingly common in applications
using contactless smart cards in the near future. Instead of the inflexible state machine,
the transponder in these cards incorporates a microprocessor.
Industry standard microprocessors, such as the familiar 8051 or 6805, are used
as the microprocessor at the heart of the chip. In addition, some manufacturers are
offering simple mathematical coprocessors (cryptological unit) on the same chip, which
permit the rapid performance of the calculations required for encryption procedures
(Figure 10.24).
Contactless smart cards with microprocessors incorporate their own operating sys-
tem , as has long been the case in contact-based cards. The tasks of the operating
system in a contactless smart card are data transfer from and to the smart card, com-
mand sequence control, file management and the execution of cryptographic algorithms
(e.g. encryption, authentication).
The programme modules are written in ROM code and are incorporated into the chip
at the chip manufacturing stage by an additional exposure mask (mask programming).
The typical command processing sequence within a smart card operating system is
as follows: commands sent from the reader to the contactless smart card are received
by the smart card via the HF interface. Error recognition and correction mechanisms
are performed by the I/O manager irrespective of higher-level procedures. An error-
free command received by the secure messaging manager is decrypted or checked for
integrity. After decryption the higher-level command interpreter attempts to decode

ROM
(Operating system)

CPU

HF
Interface

EEPROM
(Application
data)

Crypto

RAM

Transponder chip

Figure 10.24 Block diagram of a transponder with a microprocessor. The microprocessor con-
tains a coprocessor (cryptological unit) for the rapid calculation of the cryptological algorithms
required for authentication or data encryption