The Architecture of Electronic Data Carriers - RFID: Fundamentals and Applications in Contactless Smart Cards and Identification - page 283

Block 0, page 0: 16 bytes
Block 0, page 1, 16 bytes
Block 0, page 2, 16 bytes
Block 0, page 3, 16 bytes
Block 0, page 4, 16 bytes
Block 0, page 5, 16 bytes
Block 0, page 6, 16 bytes
Block 0, page 7, 16 bytes

Block 1: 128 bytes

Block 7: 128 bytes

Access register: 16 bytes

Unique chip ID: 16 bytes

Figure 10.22 Memory configuration of the AT24RF08. The available memory of 1 Kbyte is
split into 16 segments (blocks 0-7) of 128 bytes each. An additional memory of 32 bytes contains
the access protection page and the unique serial numbers. The access protection page permits
different access rights to be set in the memory for the HF and I 2 C bus interface

bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0

SB0 RF0 PB0 Addr 0

Addr 1
Addr 2
Addr 3
Addr 4
Addr 5
Addr 6
Addr 7

SB1
SB2
SB3
SB4
SB5
SB6
SB7

RF1
RF2
RF3
RF4
RF5
RF6
RF7

PB1
PB2
PB3
PB4
PB5
PB6
PB7

Addr 8

SB AP PB AP

Addr 9

WP7 WP6 WP5 WP4 WP3 WP2 WP1 WP0

DE DC Addr A

Addr B
Addr C
Addr D
Addr E
Addr F

Tamper

Reserved
Reserved
Reserved
Reserved
Chip-revision

Figure 10.23 The access configuration matrix of the module AT24RF08 facilitates the inde-
pendent setting of access rights to the blocks 0-7