DC-DC Conversion - Analog Organic Electronics - page 152

Table 6.7 Summary of the measurement results for the dual Dickson DC-DC converter integrated
on a foil
Specification V out , h V out , l

Power supply 20V

Clock frequency 300Hz

Voltage conversion ratio (@20V) 2.5 3

Maximal output voltage (@20V) 50V − 40V

Output current 5nA − 5nA

Output power 0.17 µ W

Tuning range 40% 30%

Oscillator and buffer current 520nA

1.1 × 1.4 mm 2

Chip area

6.3.3 Design 3

In order to make DC-DC converters feasible in organic electronics technology it is
more important that their power consumption is minimized, rather than increasing
the efficiency. The following design is a redesign of the second design where the
reduction of the power consumption and the optimization of the output voltage get
all the focus. Both are expected to have a positive influence on the efficiency as well.

6.3.3.1 Schematic

Figure 6.19 shows the schematic view of the converter. Three alterations as compared
to the design in Sect. 6.3.2 have been introduced.
Firstly, the ring oscillator has been sized with a 3

L ratio for
the transistors, which of course reduces the power consumption of the ring oscillator
without drastically changing the clock frequency.
Secondly, the last buffer has been designed with another architecture. A zero- V GS -
load inverter, as applied in the ring oscillator, only passively pulls down the signals
andmoreover puts an intrinsically heavy capacitive load to the output node. Therefore
such a buffer scores bad for driving a certain capacitive load. The implementation of
the buffer in the improved design applies an active signal to the load transistor. This
inverted input signal is easily obtained from the previous nodes in the buffer chain
and the buffer can now be smaller while driving a larger capacitor at its output. The
reason why this active-load inverter is not used in the ring oscillator is that in every
stage the lower voltage level of the clock signal is incremented by a voltage around
V T , hence the ring oscillator would undergo a certain voltage drop per stage and in
the end stop oscillating.
The third alteration that has been made is the implementation of the last diode-
connected transistor S 4 in the forward path of the converter as this improves the
biasing of this diode. All the diodes in the forward path are performing in a poor

. 5 times smaller W /