Digital Signal Processing Reference
In-Depth Information
Fig. 6.18 Chip photograph of the dual Dickson DC-DC converter on foil (Marien et al. 2011 ). On
this photograph two samples of the presented circuit are visible facing eachother
consumption in the ring oscillator and the buffers. It is even slightly worse since
the current in the oscillator has not decreased as much as the output current of the
converter.
P out
P in +
P out
P clk
η =
P clk
(6.10)
As ameasure of variation in the design five samples of this circuit have beenmeasured
on three different wafers from the same batch. The result is presented in Fig. 6.17
where black, dark grey and light grey correspond to the measurements on each wafer.
From the plot it can be concluded that the high output voltage V out , h undergoes a
small variation whereas the V out , l suffers from a higher variation between the curves.
It is expected that the variation is proportional to the number of stages in the converter.
This partly explains the higher variation in the lower curves. However, on account
of the symmetry between the upper and lower circuits the outlier in the lower curves
is probably caused by one malfunctioning diode in the forward path as that specific
output signal always measures
3 of the other curves.
This converter is implemented on a foil and the active areameasures 1.1
2
/
1.4mm 2
which is four times less than the area for the first design, although both are in different
technologies hence difficult to compare. The chip photograph of this design is shown
in Fig. 6.18 . All measurement results are summarized in Table 6.7 .
×
Search WWH ::




Custom Search