Hardware description language - Software Development Case Studies in Java - page 95

[bus.command ACK]

READ_MEM0 WRITE_MEM2

bus.command RAM_WRITE
bus.data RegA
bus.address 2

HALT

bus.command RAM_READ
bus.address 0

[bus.command ACK]

READ_A

ADD

RegA bus.data RegA RegA RegB

WRITE_MEM2
bus.command RAM_WRITE
bus.data RegA
bus.address 2

READ_B

RegB bus.data

[bus.command ACK]

Figure 5.7 CPU state machine

5.4.3 Implementation

Since the elements that make up the system are interdependent, we start by
implementing the parts that are not dependent on other elements and leave
undetermined some features of other elements that are not yet known.
Afterwards we will return to these features to complete the classes.
We start from the top class, Computer . The semantics of the aggregation
associations between the computer and its component can be expressed by
using the keyword “final” and initializing the attribute inline (see Sidebar
5.1). Since we have not defined the classes Bus , CPU and RAM we do not yet
know the parameters required by their constructor.

public class Computer {
final Bus bus # new Bus( ? );
final CPU cpu # new CPU( ? );
final RAM ram # new RAM( ? );
void simulate( int numSteps){
for ( int step # 0; step<numSteps; !! step){
cpu.execute();
ram.execute();

}

}

}