This chapter investigates the use of Java as a hardware description language
(HDL). The program simulates a typical computer that adopts the Von
Neumann architecture. The basic components are the RAM memory that
stores the programs and the data, the keyboard that reads input data from
the command-line, the monitor that displays the results, the CPU that
processes the elementary operations (load, store, add, jump, etc.), and the
bus that interconnects the basic components.
Focus: this case study exemplifies the exchange of data between objects
and the use of state transition diagrams to describe the behaviour of the
OO techniques: inclusion.
Java features: Vectors, Files.
Background: the reader is required to know the basic OO concepts and
fundamental Java programming techniques.
Hardware description languages (HDLs) have been very popular in the last
decade. They allow a hardware engineer to describe the system he or she
wants to build in terms of the functionalities that it must provide.
The key success factor of HDLs is that they give the opportunity to simu-
late and test a high-level description of the system, which can be defined with
a relatively little effort when compared with gate-level or even transistor-level
HDLs usually incorporate most of the features that are used in general-
purpose programming languages: namely structured programming con-
structs and OO concepts. Usually, HDLs build on a rich set of libraries that
support the automatic generation of low-level system descriptions that can
be easily synthesized in hardware components.
The aim of this case study is to use the Java language as HDL. The focus
is on the simulation of common hardware components, such as the RAM, the
O devices, the CPU and the bus. These components interact accordingly
with the Von Neumann architecture, as indicated in Figure 5.1.