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Fig. 8.3 Readout logic
Fig. 8.4 Logic for a standard cell of long-term memory
Readout Details
The output of a standard cell is y o . This output will be true only if both Rout and
Lout are true for a given cell and also if Q is true. Requiring a true value for Rout
and Lout, as well as Q prevents false recall signals. The standard cell is organized
below in such a way that Rout and Lout cannot both be true unless there is output
from each cell in the word. Figure 8.3 illustrates an appropriate readout circuit.
The neural logic in a standard cell can now be summarized as in Fig. 8.4 .
The Rout and Lout signals may be connected to give a word with any number of
standard cells. An example of four cells is shown in Fig. 8.5 .
The Rin signal will take a certain (short) amount of time to ripple across the
memory word; so will the Lin signal. They meet in the middle. Where the signals
overlap, output is possible since the local Rout and Lout must be true in order to
have output. Thus output begins from the middle of the word and soon is available
at both ends.
Note that the x i inputs (i
x oi
outputs. E represents a memory system enable that energizes Rin entering on the
left and Lin entering on the right, and possibly also prepares the memory elements
to be used. When E goes true it begins a memory search.
¼
1, 2, 3, 4) coming from above are also the x i ¼
 
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