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Fig. 7.7 Symbol for
reversible modulo-sum
generation
register-stationary. Typically in man-made hardware, data must be moved from
disk memory to local random access memory and then to various registers in a
microprocessor; then it must be moved back to local memory and then back to disk
memory.
Random access reading and writing is the mainstay of desktop computers. But
this dissipates extra heat and uses extra time, and a bottleneck occurs on the data
bus that drastically slows down a conventional computer. The biological brain can
avoid such inefficiencies.
Reversible Addition of Positive Integers
A reversible adder will now be analyzed as having two components: a block that
computes the sum, and a block that computes the carry.
Reversible Sum
A modulo-two sum of three bits may be computed logically as in Fig. 7.7 . The block
receives the binary inputs a , b , c and produces the binary outputs a , b , a + b + c ,
where + in this context means modulo-two addition, symbolized as follows.
Note that c can be thought of as a carry in, and will be toggled if aa
b
¼
1. To
preserve reversibility, a and b are unchanged. For example, let a, b, c
0, 1, 1;
then, out of the right side comes 0, 1, 0. The a + b + c equals zero, the modulo-two
sum of the three bits 0 + 1 + 1. If a, b, c
¼
1, 1, 1, then, out of the right side comes
1, 1, 1. The a + b + c equals one, the modulo-two sum of 1 + 1 + 1.
It is necessary to specify the direction of the flow. The bar in the block symbol
indicates the direction of the flow, from left to right, so operations execute in order
from left to right. This calculation is logically reversible. Entering 0, 1, 0 on the
right, for example, and executing gates in order from right to left result in 0, 1, 1 on
the left. No information is lost since reversible toggles are used.
¼
Reversible Carry
A carry c 1 may be computed as c in0 a + c in0 b + ab , where + in this context means
OR. This is known in digital design as the two-out-of-three function. The three
 
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