Arithmetic Using Simulated Qubits - Brain Theory from a Circuits and Systems Perspective - page 113

contained wholly within the register of simulated qubits that holds a given image,
and this is where priority will be stored. Addition is well understood, but when it is
constrained to be accomplished locally, without external memory and data buses,
details are important.
Special terms are helpful in order to describe how controlled toggles can be
programmed. Qubits that are being toggled are termed “to” qubits. The qubits that
are controlling are termed “fm” qubits. Logic is such that all controlling fm qubits
must be true in order to toggle all to qubits. Usually the controlling qubits are
disjoint from those qubits being toggled, since this preserves logical reversibility.
Controlled toggles are sufficient to accomplish a wide variety of digital arithme-
tic without a power-dissipating data bus. This method is powerful; geniuses and
savants might very well rely on controlled-toggle operations performed subcon-
sciously on a massively parallel scale. However the main purpose of this chapter is
not arithmetic in general, but to show how weighting factors may be summed
digitally to compute priority. Each returned image has its own register where
priority is calculated, all in parallel.
Symbols for reversible logic are essential and will now be introduced.

Introduction to Controlled Toggling

A register of controlled toggles can be mapped as in Fig. 7.1 .
This word will be given an ability to test a selected set of its own q-qubits,
defined to be the fm qubits; if the tested qubits are all true, then one or more
objective bits within itself, the to qubits will be complemented or flipped.
At this point it is helpful to define a “wiring” diagram. Wiring diagrams were
introduced by reversible computing researchers such as Charles H. Bennett [ 1 ].
A wiring diagram does not involve any wires; rather, a wiring diagram serves to
specify logically reversible programming. One may imagine that each line in a
wiring diagram is related to a simulated qubit position in each of the parallel
register words as suggested in Fig. 7.2 . There may be any number of words, up to
L 2 N , each with different bit patterns. Each word is going to be modified ¼

Fig. 7.1 Toggle register

Fig. 7.2 A wiring diagram
with example symbols and
its relationship to toggle
positions