Plans for a Recall Referee - Brain Theory from a Circuits and Systems Perspective - page 99

Note that binary weights are restricted to insure that intended priorities are
computed. For instance, danger creates a higher priority, 100 plus something.
The other weights sum to only 011, and are chosen so that they will never overrule
danger.
Addition is accomplished with the help of code stored in a special portion of
subconscious long-term memory. The stored code directs a meaningful sequence of
controlled toggles. Signals from given source qubits instigate toggles in given
target qubits, ideally disjoint from the source qubits. Simulated qubits can commu-
nicate with each other as appropriate since there are interneurons that serve as a bus.
A system like this is logically reversible, with implications for energy efficiency.
The system is capable of adding numerical weights, plus a wide variety of other
exotic arithmetic beyond the scope of this chapter. Real qubits, by the way, would
not necessarily need a conductive bus, but require external forces, usually electro-
magnetic, to manipulate states, effectively permitting qubits to communicate with-
out a bus. As with simulated qubits, signals from given source qubits are thus able
to instigate toggles in (different) target qubits.
Priorities for multiple returns are going to be calculated in parallel to make recall
as fast as possible. Parallel computing is one of the advantages of controlled
toggles.
The brain system is basically associative [ 4 ] and is driven by returns. When
returns occur, an Enable Calculations signal goes true; priorities are then computed
and compared. Soon after, the highest priority image is gated into consciousness.

Overview of a Recall Referee

A recall referee may be conceived as a dedicated block that does only one thing,
compute priorities. Figure 6.1 is an overview of a possible system. Returns flow
from long-term memory, and are directed automatically into registers of simulated
qubits. A given return is assumed to have up to K attributes, 1

K, where K is
an unspecified variable. Each and every image in long-term memory is made up of
differing standardized attributes, and of course a given image would never use all
available attributes, so those attributes processed are well below K in number.
A signal labeled Hit from long-term memory indicates that an image is being
returned; it will be directed into an available Attribute Register. It is assumed that
there are P registers (P is not specified here).
The important attributes are going to be encoded digitally and entered into a
Toggle Register as suggested in the figure. An upper limit of qubits per register will
be the number of attributes being processed times the number of bits per attribute,
K

k

N 1 . However, not all attributes need to be encoded, so in fact the number is
well below K N 1 . Additional scratchpad qubits are needed for calculations, so a

grand total of L simulated qubits are involved (L is not specified here).