Digital Signal Processing Reference
In-Depth Information
+
+
1
State diagram
1/10
Input data
0 0
Output data
11
+
2
0/10
+
+
1
01
10
Input data
1/00
0 1
Output data
00
+
2
0/00
+
+
1
Net diagram (Trellisdiagram)
Input data
0/00
0/00
0/00
0/00
0/00
1 0
00
Output data
+
2
01
+
+
1
10
Input data
Output data
1 1
+
2
11
t 0 t1 t2 t3 t4 t5
Illustration 252:
Example of a convolutional encoder, a state diagram and a trellis diagram
On the left there is the same convolution encoder with its total of 4 "inner" states of the shift register). The
"+" links carry out a "modula-2" or EXOR-operation out (see Illustration 251).
The state diagram represents the "set of rules" of the convolutional encoder in a very straightforward way.
In the four circles there are the different states of the shift register (state circles). An "0" or a "1" may lie at
the input of the convolution encoder; for this reason two arrows lead away from each circle. Two arrows
"land" accordingly on each state. It is possible for the arrow to begin and end on the same state. Moving
from one state to another is only possible in a quite specific manner; for instance, a change from "11" to
the state "01" is not possible in one step.
The trellis diagram shows the possible change from state to state in the time sequence, starting here from
the state "00". The states of the shift register are arranged vertically. Starting from the state "00" only two
other states ("00" and "01") are possible, depending on whether there is a "1" at the input (thin red line) or
a "0" (thick blue line). From each point in the trellis reached in principle two paths are possible, an "0"
path and a "1" path.
The input signal is on each path and after the diagonal line there is the output signal (e.g. 0/10). Among
the possible paths listed here there is the path for a specific bit pattern (see Illustration 251) and also the
most likely path for the VITERBI decoding of a signal or bit sequence which has been changed on the
transmission path or in the storage medium. (see Illustration 254).
