Digital Signal Processing Reference
In-Depth Information
In convolutional encoding, on the other hand, the input data - as with digital filters - are
"spread" over several output data in a convolution-like process. Illustration 212 shows the
structure of a straightforward convolutional encoder. The input signal
e.g. a long lasting
digitalised audio signal - in the form of a bit pattern is fed bit by bit into a two-step shift
register. At the same time the input signal is linked via an "addition" (EXOR) to the bits
of the shift register at the outputs. The shift register can take on 4 different states (00, 01,
10, and 11). In order that these states (the next bit appears here as a righthand bit in the
shift register) should correspond pictorially to the states in the shift register the input of
the convolutional encoder is registered on the right and the outputs on the left.
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The two outputs receive the same clock pulse frequency as the input signal, the redun-
dancy of the total output signal is therefore 50% greater than that of the input signal, the
prerequisite for error protection encoding.
We should now be on the look out for possibilities of visualising the signal flow at the
output in its dependency on the input signal and the states of the shift register. Two
methods have proved their worth:
• State diagram:
The states diagram shown in Illustration 253 describes completely the "system of
rules" of the convolutional encoder represented there. The four different states of
the shift register (state circles) are in the four circles. An "0" or a "1" may lie at the
input of the convolutional encoder which is why two arrows point away from each
state circle.
Let us assume an initial state "00". If a „1” is connected with the input, "11" appears
at the outputs (all the operations of the shift register result in 1 + 0 = 1). The next
state is then "01". 1/11 is entered at the arrow, the lefthand 1 is the input signal and
the righthand 11 is the output signal.
If an "0" is connected to the input the next state is "00". This is why 0/00 is entered
at the arrow.
• Network diagram:
Usually called a
trellis diagram
in the literature. The sequence in time is now an
additional factor. The four possible states of the shift register are arranged
vertically. Every additional bit at the input implies a further step to the right.
Let us begin at the top left with the state "00". A thick line means a "0" at the input
and a thin line an "1". From each point of the trellis reached a thick and a thin line
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corresponding to "0" and "1" - go to a different state. The input and output signals
are registered by the thin and thick lines.
While the state diagram forms the "set of rules" for the convolutional encoder the
encoding of a specific input signal bit pattern can be followed closely by means of the
trellis diagram.
