Digital Signal Processing Reference
In-Depth Information
master that changes the address lines halfway through its trans-
action will be detected by the monitor.
Bus monitors are used extensively during simulation and
some of them are now synthesizable, so they can be temporarily
included within an FPGA design. Connecting the error output of
the monitor to the trigger input of a trace system, or embedded
logic analyzer, will let the user capture the events leading up to,
and just after, the error.
In streaming video systems application-aware bus monitors
also detect higher-level errors: for example, a component which
outputs data packets which do not match the size described in
the preceding control packet will be logged and/or report errors.
The video trace system will show edge cases occurring which
might trigger a bug, for example when two control packets
preceding a data packet is legal (the second control packet takes
priority) but is not handled correctly by some components.
21.11 Summary
Debugging video systems can be daunting, especially when
the only visible symptom is the output of a black picture.
Many trace components are available to provide visibility into
the system and narrow down the location of the bug which is
causing the symptom. Careful use of these components can save
significant time during development.
In some cases the trace components can be left active in
shipped systems. Remote debugging can then be used on units
running real data
this can be especially valuable when the bug
has been triggered by almost standard data being generated by
other equipment that is only installed in one broadcaster, in one
distant country.
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