SECTION 3.3: TIME DELAY FOR VARIOUS 8051 CHIPS
In the last section we used the DELAY subroutine. In this section we discuss how to generate various time delays and calculate exact delays for the 8051 and DS89C4xO.
Machine cycle for the 8051
The CPU takes a certain number of clock cycles to execute an instruction. In the 8051 family, these clock cycles are referred to as machine cycles. Table A-l provides the list of 8051 instructions and their machine cycles. To calculate a time delay, we use this list. In the 8051 family, the length of the machine cycle depends on the frequency of the crystal oscillator connected to the 8051 system. The crystal oscillator, along with on-chip circuitry, provide the clock source for the 8051 CPU (see Chapter 8). The frequency of the crystal connected to the 8051 family can vary from 4 MHz to 30 MHz, depending on the chip rating and manufacturer. Very often the 11.0592 MHz crystal oscillator is used to make the 8051 -based system compatible with the serial port of the IBM PC (see Chapter 10). In the original 8051, one machine cycle lasts 12 oscillator periods. Therefore, to calculate the machine cycle for the 8051, we take 1/12 of the crystal frequency, then take its inverse, as shown in Example 3-13.
Delay calculation for 8051
As seen in the last section, a delay subroutine consists of two parts: (1) setting a counter, and (2) a loop. Most of the time delay is performed by the body of the loop, as shown in Example 3-15.
Very often we calculate the time delay based on the instructions inside the loop and ignore the clock cycles associated with the instructions outside the loop.
In Example 3-15, the largest value the R3 register can take is 255; therefore, one way to increase the delay is to use NOP instructions in the loop. NOP, which stands for “no operation,” simply wastes time. This is shown in Example 3-16.
Loop inside loop delay
Another way to get a large delay is to use a loop inside a loop, which is also called a nested loop. See Example 3-17.
The time delay inside the HERE loop is [250(1 + 1 + 1 + 1 + 2)] x 1.085 us =1500 x 1.085 us = 1627.5 us. Adding the two instructions outside the loop we have 1627.5 us + 3xl.085|is= 1630.755 us.
If machine cycle timing is critical to your system design, make sure that you check the manufacture’s data sheets for the device specification. For example, the DS89C420 has 3 machine cycles instead of 2 machine cycles for the RET instruction.
For the HERE loop, we have (4 x 250) xl.085 us = 1085 us. The AGAIN loop repeats the HERE loop 200 times; therefore, we have 200 x 1085 us = 217000, if we do not include the overhead. However, the instructions “MOV R3,#250″ and “DJNZ R2, AGAIN” at the beginning and end of the AGAIN loop add (3 x 200 x 1.085 us) = 651 us to the time delay. As a result we have 217000 + 651 = 217651 us = 217.651 milliseconds for total time delay associated with the above DELAY subroutine. Notice that in the case of a nested loop, as in all other time delay loops, the time is approximate since we have ignored the first and last instructions in the subroutine.
Delay calculation for other versions of 8051
In creating a time delay using Assembly language instructions, one must be mindful of two factors that can affect the accuracy of the delay.
products from Philips Semiconductors have the option of using either 6 or 12 clocks per machine cycle. Table 3-2 shows some of the 8051 versions with their machine cycles.
The crystal frequency: The frequency of the crystal oscillator connected to
the XI – X2 input pins is one factor in the time delay calculation. The duration
of the clock period for the machine cycle is a function of this crystal frequen
The 8051 Design: Since the original 8051 was designed in 1980, both the field
of 1C technology and the architectural design of microprocessors have seen
great advancements. Due to the limitations of 1C technology and limited CPU
design experience at that time, the machine cycle duration was set at 12 clocks.
Advances in both 1C technology and CPU design in recent years have made
the 1-clock machine cycle a common feature of many new 8051 chips. Indeed,
one way to increase the 8051 performance without losing code compatibility
with the original 8051 is to reduce the number of clock cycles it takes to exe
cute an instruction. For these reasons, the number of machine cycles and the
number of clock periods per machine cycle varies among the different versions
of the 8051 microcontrollers. While the original 8051 design used 12 clock
periods per machine cycle, many of the newer generations of the 8051 use
much fewer clocks per machine cycle. For example, the DS5000 uses 4 clock
periods per machine cycle while the DS89C4xO uses only one clock per
machine cycle. The 8051
TaDie 3-2: Clocks per Machine Cycle (MC) for
Various 8051 Versions
Delay calculation for DS89C4xO
In the case of the DS89C4xO, since the number clocks per machine cycle was reduced from 12 to 1, the number of machine cycles used to execute an instruction had to be changed to reflect this reality. Table 3-3 compares the machine cycles for the DS89C4xO and 8051 for some instructions.
Table 3-3: Comoarison of 8051 and DS89C4xO Machine Cvcles
From the above discussion we conclude that use of the instruction in generating time delay is not the most reliable method. To get more accurate time delay we use timers as described in Chapter 9. Meanwhile, to get an accurate time delay for a given 8051 microcontroller, we must use an oscilloscope to measure the exact time delay.
SJMP to itself using $ sign
In cases where there is no monitor program, we need to short jump to itself in order to keep the microcontroller busy. A simple way of doing that is to use the $ sign. That means in place of this
The flow of a program proceeds sequentially, from instruction to instruction, unless a control transfer instruction is executed. The various types of control transfer instructions in Assembly language include conditional and unconditional jumps, and call instructions.
The looping action in 8051 Assembly language is performed using a special instruction, which decrements a counter and jumps to the top of the loop if the counter is not zero. Other jump instructions jump conditionally, based on the value of the carry flag, the accumulator, or bits of the I/O port. Unconditional jumps can be long or short, depending on the relative value of the target address. Special attention must be given to the effect of LCALL and ACALL instructions on the stack.