The Instruction (Microcontrollers)

1.2
We now examine the notion of an instruction, which is an indivisible operation performed by the MPU. It can be described statically as a collection of bits stored in memory or as a line of a program or, dynamically, as a sequence of actions by the controller. In this discussion we begin with a simplified dynamic view of the instruction and then develop a static view. Examples are offered to combine these views to explain the static aspects of the operation code, addressing mode, machine code, and mnemonics. We conclude with an expanded view of the dynamic aspects of the instruction cycle.
The controller will send commands to memory to read or write and will send commands to all other parts of the computer to effectively carry out the intentions of the programmer. The specification of what the control unit is to do is contained in a program, a sequence of instructions stored, for the most part, in consecutive bytes of memory. To execute the program, the MPU controller repeatedly executes the instruction cycle (or fetch/execute cycle):
1. Fetch (read) the next instruction from memory. 2. Execute the instruction.
As we shall see with the 6812 MPU, reading an instruction from memory will require that one or more bytes be read from memory. To execute the instruction, some bytes may also be read or written. These two activities, read and execute, seem to be read or write operations with the memory but are quite different to the MPU, and we use different terms for them. To fetch means to read a word from memory to be used as an instruction in the controller. The first step in the cycle shown previously is the fetch phase. To recall means to read a word into the MPU that is not part of the instruction. The recall and write operations are done in the second step of the instruction, which is called the execute phase. Thus, when we talk about fetching a word, you can be sure that we are talking about reading the instruction, or part of the instruction. We will not use “fetch” to describe an operation of reading data to be input to the data operator.
The 6812′s registers are shown in Figure 1.2, where the top five registers hold 16 bits and the condition code register holds 8 bits. The 16-bit D register is composed of two 8-bit registers A and B; D, A, and B are called accumulators because arithmetic operations can be done with their contents with the results placed back in the registers to accumulate the result. This accumulating aspect of registers D, A, and B will be assumed to be understood so that we often refer to (register) “D,” “A,” or “B” rather than “accumulator D,” “accumulator A,” or “accumulator B.” The registers A and B are always the left and right halves of register D; if you put $ 12 in register A and $34 in register B then read register D, it has $1234. Similarly, if you put $5678 in register D, then reading register A gives $56 and reading register B gives $78. Registers X and Y are

a. The Machine State

b. Breakdown of the D Register
Figure 12. Registers in the 6812
index registers, and SP is a stack pointer; they are used in address calculations. The program counter, PC, is used to fetch the instruction. It is called a counter because it normally increments each time it is used. The condition code register (CC) has bits that are used to indicate results of tests that can be used in conditional branch instructions.
At the beginning of the instruction cycle it is assumed that the program counter contains the address of the first byte of the instruction. As each byte of the instruction is fetched, the PC is incremented by 1, so that the PC always has the address of the next byte of the instruction to be read from memory. When the instruction cycle is completed, the PC then automatically contains the address of the first byte of the next instruction.
We now look at the instruction statically as one or more memory bytes or as a line of a program. This discussion will introduce new concepts, but we have tried to keep the number down so that the examples can be discussed without your having too many terms to deal with. The examples will help to clarify the concepts that we introduce below.
Each instruction in a microcomputer carries out an operation. The types of operations provided by a von Neumann computer can be categorized as follows:
1. Move. 2. Arithmetic. 3. Logical.
4. Edit. 5. Control. 6. Input/output.
At this time, we are interested in how instructions are stored in memory as part of a program and how they are executed by the 6812.
After the instruction is fetched, the execute phase of the fetch execute cycle will often use an address in memory for the input data of the operation or for the location of the result of the operation. This location is called the effective address. The Motorola 6812, like most microcomputers, is a one-address computer because each instruction can specify at most one effective address in memory. For instance, if an instruction were to move a word from location 100 in memory into register A, then 100 is the effective address. This effective address is generally determined by some bits in the instruction. The addressing mode specifies how the effective address is to be determined, and there are binary numbers in the instruction that are used to determine the address. The effective address is calculated at the beginning of the execute phase, just after the instruction is fetched and before any of the operations actually take place to execute the instruction.
An instruction in the 6812 is stored in memory as one or more bytes. The first, and possibly only, byte of the instruction is generally the operation code byte. The operation code byte contains the operation code (opcode, for short), which specifies the operation to be carried out and the specification of the addressing mode. The remaining bytes of the instruction, if any, specify the effective address according to the given addressing mode. The bytes representing the instruction can be represented as a sequence of ones and zeros, that is, a binary number. The trouble with this is that it is hard to remember and to check an 8-bit or longer string of ones and zeros. To make it easier, we can represent the bit pattern as a hexadecimal number. A hexadecimal number will be prefixed by a dollar sign ($) to distinguish it from a decimal number. (For example, 193 = $C1. If you are unfamiliar with hexadecimal numbers, see Appendix 1.) When the opcode, addressing modes, and constants used to determine the address are represented either as binary or hexadecimal numbers, we call this representation the machine code because it is the actual format used to store the instruction in the machine (microcomputer), and this format is used by the machine to determine what is to be done.
Machine code is quite useful for making small changes in a program that is being run and corrected or debugged. However, writing even a moderately long program in machine code is a punishment that should be reserved for the fifth level of Dante’s inferno. In topic 4 we discuss how text produced by an editor is converted by an assembler to the machine code stored in the computer’s memory. The text input to the assembler is called source code. In a line of source code, to make remembering the instructions easier, a three- or four-character mnemonic is used to describe the operation, and its addressing information may be given as a hexadecimal or a decimal number. A line of source code, consisting of mnemonics and addressing information, can be converted by hand into their hexadecimal machine code equivalents using Motorola’s CPU 12 Reference Guide (you can order it from Motorola by using reference number CPU12RG/D). In the first three topics, we want to avoid using the assembler, to see clearly just how the computer ticks. We will hand-convert mnemonics and addressing information to hexadecimal machine code and work with hexadecimal machine code.
We now look at a load immediate instruction in detail, to introduce concepts about instructions in general. The load instruction will move a byte into an accumulator, either A or B. Its simplest addressing mode is called immediate. For instance, to put a specific number, say $2F, in accumulator A, execute the instruction whose source code line is
LDAA #$2F
where the symbol “#” denotes immediate addressing and the symbol “$” is used to indicate that the number that follows is in hexadecimal. This instruction is stored in memory as the two consecutive bytes:

(Look in CPU 12 Reference Guide, Instruction Set Summary, for the mnemonic LDAA and, under it, find $86 in under the Machine Coding column, in the row beginning LDAA #opr8i, which also has the addressing mode IMM for immediate addressing.)
Looking dynamically at an instruction, an operation (e.g., add, subtract, load, clear, etc.) may be carried out with inputs (or operands) and may produce a result. The instruction is executed in the instruction cycle as follows.
1. Fetch the first byte of the instruction from memory.
2. Increment the PC by one.
3. Decode the opcode that was fetched in step 1.
4. Repeat steps 1 and 2 to fetch all bytes of the instruction.
5. Calculate the effective address to access memory, if needed.
6. Recall the operand from memory, if needed.
7. Execute the instruction, which may include writing the result into memory.
The controller fetches the first byte, $86. The program counter is incremented. The controller decodes $86. The controller fetches the second byte, $2F, putting it into accumulator A. The program counter is incremented. After this instruction is executed, another instruction is fetched and executed.