Variable Word Width (Microcontrollers)

1.5
We have glibly stated that a 6812 can have either 8-bit or 16-bit word widths. The fastidious reader might wonder how this takes place. This optional section provides details on how a 6812′s word widths can be either 8 bits or 16 bits wide, as discussed.
The word width is a function of the instruction and of the bus mode discussed in the last section. As noted in the last section, external memory can utilize a narrow or a wide data bus. We first consider an external memory using the wide data bus and comment on such a memory using a narrow bus at the end of our discussion. Figure 1.16 illustrates a 6812 system with an internal memory at locations $800 to $bff and an external memory at locations $7000 to $7fff, each composed of two 8-bit-wide memory “banks.”The word width is a function of the instruction and of the bus mode discussed in the last section. As noted in the last section, external memory can utilize a narrow or a wide data bus. We first consider an external memory using the wide data bus and comment on such a memory using a narrow bus at the end of our discussion. Figure 1.16 illustrates a 6812 system with an internal memory at locations $800 to $bff and an external memory at locations $7000 to $7fff, each composed of two 8-bit-wide memory “banks.”

Figure 1.16. Variable Word Width Implementation
Each internal 8-bit wide memory bank’s decoder can decode addresses on different buses, while both external 8-bit wide memory banks’ decoders decode the same address. The even memory bank stores even bytes, such as 0, 2, 4, . . . while the odd memory bank stores odd bytes, such as 1, 3, 5, . . .. The effective address computed by the instruction is generally shifted one bit right to derive the address that is presented to the memories (memory address). The original effective address’s least significant bit indicates which 8-bit memory is accessed.
We will consider reading an 8-bit word first, which is the simplest operation. Then we discuss writing an 8-bit word, reading a 16-bit word, and writing a 16-bit word.
Consider reading an 8-bit word into accumulator A. A whole 16-bit word can be read from both banks of either the internal memory at locations $800 to $bff or external memory at locations $7000 to $7fff, using the same memory address; and the switches to the right of accumulator A can feed the byte from an even or odd memory bank to it, depending on whether the byte address is even or odd. Writing accumulator A into memory can be effected by putting that register’s data on both even and odd byte data buses and giving the command to write to an even or odd bank depending on whether the effective address is even or odd. The bank that does not get the command to write will see the byte on its data input but won’t write that byte into its memory.
Consider reading a 16-bit word into accumulator D, which is accumulator A concatenated with accumulator B. If the address is even, then a 16-bit word is simply read from both banks, using the same memory address, through both data buses and written
into both accumulators A and B. Reading a 16-bit word from an odd effective address in the internal memory can be done in one memory cycle; the even-byte memory bank can decode a memory address one above the memory address of the odd bank, and the switches next to the accumulators can reroute the bytes into the correct accumulators. However, reading a 16-bit word from an odd address in the external memory is done in two memory cycles; Ihe byte at the lower address is read first, as discussed in the previous paragraph, then the byte at the higher address is read.
Consider writing a 16-bit word from accumulator D. If the address is even, simply write a byte from both accumulators A and B through both data buses into both banks. If the address is odd, writing 16 bits is easily done in the internal memory; each byte is written, but at different addresses in the even and odd byte memory banks. But if the address is odd, writing 16 bits into the external memory is done by writing the lower addressed byte first in one memory cycle, then writing the other byte in the next cycle.
Each access to read or write a byte through an 8-bit narrow bus takes one memory-cycle. Each access to read or write a 16-bit word uses two memory cycles.
Cycle counts in the CPU12RG/D manual Instruction Set Summary are for instructions and data read and written in internal RAM. These counts may be higher when instructions and data are read from or written into external RAM.
At the beginning of this topic, we proposed to show you how an instruction is executed in a microcontroller. But from this discussion of 6812 memory operations, you see that a simple operation becomes significantly more complex when it is implemented in a state-of-the-art microcontroller. Just reading a 16-bit word from memory might be done several ways depending on where the word is located, inside or outside the microcontroller, or using an even or an odd address. But from the point of view of how an instruction is executed in the 6812, a simple model that explains the concept fully is better than the fully accurate model that accounts for all the techniques used to implement the operation; we simply state that a 16-bit word is read from memory. The reader should understand how instructions are executed, but from now on in this topic, we will use a simplified model of the hardware to explain how an instruction is actually implemented in hardware (in an idealized microcontroller, rather than the real 6812).