Solid-State Nanopores: Methods of Fabrication and Integration, and Feasibility Issues in DNA Sequencing - Nanopores: Sensing and Fundamental Biological Interactions - page 186

8.3 An Integration Strategy for Multiple
Nanopores: Electrically Addressable Pores

The field of solid-state nanopores has experienced significant growth during the
past few years. However, for many biotechnology applications, single nanopore
devices are inadequate. For example, in the proposed DNA sequencing platform,
hybridization-assisted nanopore sequencing or HANS (Ling et al. [ 14 ]), the
sequencing is achieved by combining DNA hybridization and solid-state nano-
pores. In HANS, one needs to analyze large number of DNA probes. For example,
for 8-mer DNA probes, there are 4 8 65,536 possible combinations. Thus devel-

oping integrated nanopore devices will be crucial to many applications. Here, the
effort in developing addressable nanopores is discussed.
It was proposed (Ling [ 15 ]) that one can realize an electrically addressable
nanopore array (EANA) device by utilizing the unique property of anistropic
etching of silicon crystals. As shown in Fig. 8.7 , long V-shaped grooves will result
due to the anisotropy of the etching rates of a

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-oriented silicon wafer.
An example is shown in Fig. 8.7 (mid). Thus if a silicon wafer is etched from
both sides to form V-shaped grooves at the right angle, when the tips of V-grooves
are etched just open (this can be done to within 20 nm accuracy by controlling the
etching rate and etching time), a linear array of nanopores will be formed.
After etching, the whole device can be oxidized to form SiO 2 to insulate all
silicon surfaces. The next step is to seal both the front and the back sides of the
silicon chip with glass slides and curable polymer (e.g. Dow CYCLOTENE) with
proper microfluidic tubings (e.g. Upchurch Scientific) and electrodes (Ag/AgCl)
connected. The resulting device is sketched in Fig. 8.7 (right).
The unique feature of the EANA device is that one can use an electric field to
bias a pore while at the same time use pressure to control the ionic solutions on both
sides of the pore. By placing the electrodes in different V-grooves on the topside of
the wafer, one can measure the electrical current through each pore independently.
This feature is essential for high throughput applications.
Figure 8.8 shows a sample with over-etched pores for visualization purposes.
The device shows 3

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5 ¼ 15 over-etched pores of size about 5 m m. The process

Fig. 8.7 ( Left ) A linear array of electrically-addressable nanopores formed by etching a silicon
wafer. ( Mid ) A SEM micrograph of a V-groove on the silicon surface after wet etching

with KOH. The scale bar is 500 nm. ( Right ) A sketch of a possible EANA nanopore array system.
For clarity, only one V-groove is drawn for the upper side of the device

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