Optimizing Capacitance and Switching Activity to Reduce Dynamic Power - Computer Architecture Techniques for Power-Efficiency - page 85

TABLE 4.7: Four Approaches for Adapting the Cache to the Needs of Programs

Partitioning Granularity Partitioning Technique Configuration Method

Variable L1/L2 division
Albonesi [ 7 ],
Balasubramonian
et al. [ 21 ].

Physical Memory
Segment (cache bank)

A single physical cache
partitioned into
segments hosts a virtual
two-level cache.
Memory segments are
allocated to either a
virtual L1 or a virtual
L2

Configuration searches are initiated on
program phase changes. A
configuration search goes through
each possible configuration and
measures CPI,
The “best” configuration is selected and
persists for the duration of the phase

Selective Cache Ways,
Albonesi [ 8 ]

Associative Way (may
comprise one or more
banks)

Individual associative
ways can be turned off
adapting the size of the
cache to program needs

Left to software. Profiling and
performance tools indicate the
number of ways for some tolerated
level of performance-loss

Accounting Cache,
Dropsho et al.,
Albonesi et al. [ 68 , 9 ]

Associative Way (may
comprise one or more
banks)

Similar to Variable L1/L2
division, but with the
partitioning granularity
of the Selective Cache
Ways

Performance and energy for all possible
configurations are estimated
periodically with MRU information,
One-shot configuration: the “best”
configuration is selected and persists
for the next period

Miss Tag Resizing for
CAM-Tag Caches,
Zhang and Asanovic
[ 244 ]

Individual Set resizing in
its associativity

Bit-line Segmentation
(“Sidebar: Bit-line
Segmentation”)

Performance-based Feedback Control:
difference in number of misses from
the full-sized cache within a time
window