Optimizing Capacitance and Switching Activity to Reduce Dynamic Power - Computer Architecture Techniques for Power-Efficiency - page 74

did not specify, in this first paper, any mechanisms or policies needed to dynamically adapt the
hardware. This is one of the main contributions of the work that followed suit.

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C product,
and both R and C are proportional to the wire length, it follows that the wire delay is
proportional to the square of the wire length. Long wires can become unacceptably slow.
To solve this problem, a long wire is broken into smaller segments by placing repeaters
(inverters or buffers) at regular intervals along its length. The repeaters are driving each of
the smaller segments. Breaking a wire into k segments improves wire delay by a factor of k 2
but the repeaters themselves introduce additional latency. However, there is a downside.
The total combined power consumption for driving the segmented wire can be
significantly higher than that of the original wire. In fact, the total energy needed for
the optimally-sized repeaters increases exponentially with k [ 39 ]. A segmentation factor
smaller than the optimal-delay factor is typically chosen so that the increase of power is kept
at bay.
To improve on power, the solution is to actually disable a part of the wire that is not
needed. This partitioning technique replaces the inverters or buffers with tristate devices
that have the ability to electrically disconnect a segment of the wire (see Figure 4.12).

Wire Partitioning : Because the delay of a wire is proportional to its R

Total C, power, may increase
due to repeaters

Total “active” C, power, fraction of the original

Long
wire,
unacceptably

Segmented into 4 Repeaters replaced Half of the wire disabled (dynamically)

long-latency

segments with repeaters with tristate buffers

FIGURE 4.12: Wire partitioning. Breaking a wire into multiple segments by inserting repeaters
along its length dramatically improves its delay (which is proportional to the square of the wire length)
but may end up increasing the total power required due to the additional overhead of the repeaters.
Architecturally, this organization can be exploited for low-power by replacing the repeaters with
tri-state buffers and dynamically disabling part of the wire (along with everything connected on that
part) when this is advantageous.