Optimizing Capacitance and Switching Activity to Reduce Dynamic Power - Computer Architecture Techniques for Power-Efficiency - page 45

CHAPTER 4

Optimizing Capacitance and
Switching Activity to Reduce
Dynamic Power

The capacitance ( C ) and the switching activity factor ( A ) in the dynamic power equation are
intimately intertwined. In fact, it is not uncommon to see the dynamic power equation written
as: P

=

V 2

× × ,

where C effective ,the effective switched capacitance , is the product of
A and C . The switching activity factor, a fraction between 0 and 1, simply expresses how much
of the circuit's total capacitance is charged and discharged—on average—during each cycle at
the operating frequency f .
Undoubtedly, architecture and microrachitecture exert fundamental influence on both
capacitance and switching activity. It is generally accepted that instruction-level parallelism
(ILP), or more precicely the complexity required to dynamically uncover and exploit ILP,
brought dramatic increases in both factors. This, coupled with the phenomenal frequency
increase in CMOS technology, resulted in the exacerbated power problem of today. The
complexity of a processor, how aggressively it exploits parallelism—in particular ILP—the
bit-width of its structures, etc., directly affect switching activity. On the other hand, the size
of a processor's structures and how well it is organized to exploit locality (for instance, whether
functional units are clustered or not) determine the number of transistors and their intercon-
nects, hence directly affecting capacitance.
While capacitance is more effectively manipulated at the circuit and process technology
level, switching activity is effectively optimized at the architectural or microarchitectural level.
More importantly, while capacitance is determined and fixed at design time, switching activity
can change by run-time optimizations. Not surprisingly, a plethora of architectural techniques
focus on dynamically optimizing switching activity.
Chapter structure : Fundamentally, the majority of the proposed techniques aim at elimi-
nating unnecessary switching activity during computation; we call such switching excess switching
activity . The trick is to find it and eliminate it, without inordinately harming performance. In

f C effective