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harvested; further success will likely result in smaller improvements to existing policies. Second,
as leakage energy plays a greater role in total power dissipation, DVFS techniques are less
promising because of their detrimental impact on leakage.
Third, and most importantly, while DVFS has been the backbone of power management
in most processors, it faces some important limitations that will diminish its value in future pro-
cessors. While DVFS offered quadratic reduction in power (
V
2
f
) with only linear slowdown
∼
(
f
) its practical value rests on a wide range of supply voltages (e.g., 3 V to 1 V). This range is
continuously shrinking with the lowering of the upper limit but not a corresponding lowering
of the lower limit. ITRS projects for the upcoming generations (2007-2014) supply voltages
in the range of 0.9 V to 0.6 V giving a useful dynamic range of 0.2 V-0.3 V. In addition, the
lower supply voltages significantly increase the susceptibility of the devices to soft or transient
errors. And this for technologies that are inherently unreliable to begin with! It is very likely
that in future processors, DVFS will either be impractical or unfruitful if the power needed to
correct errors outweighs the power saved by voltage scaling.
∼
6.2 DYNAMIC POWER REDUCTIONS BASED ON EFFECTIVE
CAPACITANCE AND ACTIVITY FACTOR: STATUS AND
FUTURE TRENDS
A significant portion of both published research and industry practice is devoted in reducing
the effective capacitance (
C
effective
C
) term of the dynamic power equation. Classifying
the types of excess switching activity can offer a summarized checklist of steps for architects
interested in power-efficient design:
=
A
×
Check for idle-unit switching
. Clock gate every unit that can be deterministically as-
certained as idle. The granularity for clock gating should be such that its overhead is
insignificant.
Check for idle-width
. Check to see if the
width
of various structures, functional units,
data paths, memories (latches, registers, caches, etc.) is too wide for the common case.
If it is, either (dynamically) disable the unused width or overload the width by packing
more than one “narrow” operation at a time.
Check for idle-capacity
. Check to see if the
capacity
of large structures is fully utilized.
If not,
resize
to accommodate the common case without inordinately harming perfor-
mance. This eliminates switching in the unused parts of a large structure. It is also
beneficial for static power if the disabled parts, after a resizing, are completely powered
down or alternatively put into a state-preserving low-leakage mode.
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