Managing Static (Leakage) Power - Computer Architecture Techniques for Power-Efficiency - page 172

5.4.1 Dynamic Approaches
Dynamically varying the threshold voltage of a device is accomplished by biasing the substrate
body of a transistor. Two approaches have been proposed for biasing. In the first approach,
called Reverse Body Bias (RBB), the substrate body of a fast, high-leakage, low- V T device is
biased to increase its V T [ 132 ]. This results in dramatic reduction in leakage but slows down
switching. The second technique, called Forward Body Bias (FBB), starts from the opposite
direction. It takes a high- V T , low-leakage, slow device and by applying the opposite bias reduces
its V T to make it fast but high leakage [ 13 ]. Adaptive approaches based on these two techniques
have also been proposed, such as the Adaptive Body Bias (ABB) technique which uses reverse
biasing.

☞ a comparison of RBB to other leakage-reduction mechanisms : At the circuit level,

Chatterjee et al. [ 49 ] compare RBB to several techniques for subthreshold leakage
reduction including transistor stacking [ 184 ], and dynamic voltage scaling (drowsy mode or
DVS) [ 77 ]. They show that the stacking effect is the most effective means to reduce leakage
power, but because it lowers the active current in the normal operation mode, it is also slow.
They also show that lowering the supply voltage (DVS) is inferior in terms of both leakage
savings and speed (low voltage also underrates I on significantly). Thus, they conclude that
RBB is the best compromise between leakage savings and speed in normal operation mode.
RBB, however, requires the generation and routing of extra power supply to the
body and well terminals of n- and p-MOS transistors. In addition, it requires the usage
of a triple-well bulk CMOS process increasing the overall implementation cost [ 49 ]. If
the ease of fabrication is taken into account, the best compromise in leakage savings and
switching speed between high-leak and low-leak modes is the drowsy mode (DVS)—for
state-preserving techniques—or gated- V dd ( V ss )—for non-state-preserving techniques.

Combined DVFS and ABB : Adaptive RBB techniques increase the threshold voltage and thus
bring an exponential reduction in leakage power. However, the increase in threshold voltage
reduces the ( V dd

−

V T ) difference, slowing down switching [ 195 ]:

V dd

V T ) a .
It is evident that either scaling V dd or increasing V T slows down switching. The question
is which one to change for a given performance level.

Delay ∝

( V dd −

Voltage scaling, discussed extensively in Chapter 3, decreases dynamic power quadrat-
ically to the supply voltage:

V dd .

P = C eff × f ×