Introduction - Computer Architecture Techniques for Power-Efficiency - page 5

In this equation, V refers to the supply voltage, while V th refers to the threshold voltage.
The exponential link between leakage power and threshold voltage is immediately obvious. 1
Lowering the threshold voltage brings a tremendous increase in leakage power. Unfortunately,
lowering the threshold voltage is what we have to do to maintain the switching speed in the
face of lower supply voltages. Temperature, T, is also an important factor in the equation:
leakage power depends exponentially on temperature. The remaining parameters, q , a ,and k a ,
summarize logic design and fabrication characteristics. The exponential dependence of leakage
on temperature, and the interplay between leakage and dynamic energy will be discussed in
more detail in Chapter 2.
1.2.3 Other Forms of CMOS Power Dissipation
While dynamic and leakage power dominate the landscape, other forms of power dissipation
do exist. For example, short circuit or “glitching” power refers to the power dissipated during
the brief transitional period when both the n and p transistors of a CMOS gate are “on,”
thus forming a short-circuit path from power to ground. This is distinguished from dynamic
power because dynamic power typically refers to power dissipated due to discharging charged
capacitors; it would be dissipated even if transitions occurred instantaneously. In contrast,
glitching power refers to transitional power that occurs because of non-ideal transition times.
1.3 POWER-AWARE COMPUTING TODAY
From the early 1990s to today, power consumption has transitioned into a primary design
constraint for nearly all computer systems. In mobile and embedded computing, the connec-
tion from power consumption to battery lifetime has made the motivation for power-aware
computing very clear. Here, it is typically low energy that is stressed, although obviously
power/performance is also important for some embedded systems with high computational
requirements.
In desktop systems, the key constraint has become thermal issues. Excessive power
consumption is one of the prevailing reasons for the abrupt halt of clock frequency increases.
Currently, high-performance processor clocks have hit a “power wall” and are pegged at or
below 4 GHz. This is contrary to 2001 ITRS projections which predicted clocks in excess of
6 GHz by roughly 2006. Power consumption is also one important factor driving the adoption
of chip multiprocessors (CMPs) since they allow high-throughput computing to be performed
within cost-effective power and thermal envelopes.
1 What is not shown in this simplified equation is the—also exponential—dependence of leakage power to the supply
voltage. This is discussed in Chapter 5.