Managing Static (Leakage) Power - Computer Architecture Techniques for Power-Efficiency - page 148

Per-cache-line adaptive decay : The idea behind this technique is to dynamically adjust
the decay interval individually per cache frame. The criterion for adjusting it is based on the
accuracy versus the aggressiveness of the dead line prediction. If the decay interval is too small
(too aggressive), then a cache line might be predicted dead while it is still in its live time which
leads to decay-induced misses. In this case, the decay interval is increased . In contrast, decay
intervals that are too large—although very accurate in predicting dead lines—waste considerable
time before saving leakage thus incurring a significant fixed overhead. In this case the decay
interval is decreased .
There are two issues in implementing this technique: first an efficient way of increasing
and decreasing the decay interval, individually per cache line , must be available. This is solved
by halving or doubling the decay interval as this is the easiest thing to do (see “Sidebar: per-
cache-line adaptive implementation details” for details). Second, a scheme for deciding whether
the decay interval is too large or too small must be devised. This is accomplished by detecting
when decay makes mistakes, that is, when it causes decay-induced misses. If a cache line is
turned off and, as a result, a decay-induced miss ensues, the decay interval is too short and is
increased. Going the opposite direction is opportunistic: in the absence of any decay-induced
misses (dead lines are replaced by different lines), the decay interval is reduced in hope that
this will decrease the fixed cost without incurring new decay-induced misses (see “Sidebar:
Per-cache-line Adaptive Implementation Details” for further details).

☞ per-cache-line adaptive implementation details : There are two ways to change the decay

interval independently for each cache line. The first is to change the number of active
counting bits in the local counter of a cache line. The second, and the one adopted in [ 127 ],
provide not one but several global signals, each “beating” at a different rate (e.g., double
the previous one). This is as easy to do as to assign transitions of consecutive high-order
bits of the global counter to different global signals. To change the decay interval locally
in a cache line, the local counter simply chooses which global signal to feed from.
To change the decay interval, decay-induced misses must be readily detectable. This
is straightforward if the tags remain powered up at all times. Hits to decayed lines are
then evident. But it is also possible to empirically detect mistakes without having the tags
powered-up [ 127 ]. The method proposed is to detect mistakes by gauging how soon after
decaying a cache line its frame is accessed. This works for direct-mapped caches but still
requires at least a few powered-up tag bits to disambiguate between different cache frames
in set-associative caches.
The actual scheme proposed is shown in Figure 5.8. The local counter is double-
booked to count time even after a line is decayed. The deciding factor is the time when the
next access arrives . An access very soon after decaying a line, is taken to be a decay-induced
miss (even if it is unclear if it is truly an access to the same cache line). The decay interval