Managing Static (Leakage) Power - Computer Architecture Techniques for Power-Efficiency - page 137

5.1.2 Gate Leakage
Gate leakage (also known as gate- oxide leakage) is a major concern because of its tremendous
rate of increase. It grew 100-fold from the 130 nm technology (2001) to the 90 nm technology
(2003) [ 31 ]. Major semiconductor companies are switching to “high-k” dielectrics in their
process technologies to alleviate this problem [ 31 ].
Gate leakage occurs due to direct tunneling of electrons through the gate insulator—
commonly silicon dioxide, SiO 2 —that separates the gate terminal from the transistor channel.
The thickness, T ox ,ofthegateSiO 2 insulator must also be scaled along with other dimensions
of the transistor to allow the gate's electric field to effectively control the conductance of the
channel. The problem is that when the gate insulator becomes very thin, quantum mechanics
allow electrons to tunnel across. When the insulating layer is thick, the probability of tunneling
across it is virtually non-existent. As the insulating layer becomes thinner, tunneling becomes
stronger. Gate-oxide thickness has scaled from 100 nm (1000 ˚ A) to just 1.2 nm (12 ˚ A) in 90 nm
and 65 nm technologies. This corresponds to a thickness of just 4-5 atoms [ 50 , 31 ]! The result
is an uncontrollable, exponential increase in gate leakage.
Gate leakage is somewhat dependent on temperature but strongly dependent on the
insulator thickness and the gate-to-source ( V gs ) or gate-to-drain ( V gd ) biases seen by the
device. Without the V gs or V gd biases, the necessary electric field to cause the electrons to
tunnel across the gate is absent. Since the supply voltage ( V dd ) determines the magnitude
of V gs and V gd , scaling V dd reduces gate leakage. There is also a weaker dependence of gate
leakage on V ds —the voltage across the drain and source—that ties gate leakage to the state of a
circuit [ 190 ].
The most promising remedy for gate leakage, and the one that is currently in use in the
latest generation 45 nm technologies, is to insulate the gate using high-k dielectric materials
instead of the more common SiO 2 oxide material. 4 A thicker insulating layer of a high- k
material can be as good as a thin layer of a low- k material. The increased thickness significantly
reduces the tunneling effect but at the same time does not compromise the ability of the gate
to control the channel. In other words, performance is not compromised.
Architecturally, gate leakage has not been given the same attention as subthreshold
leakage. For the most part, it is considered as an additional leakage component and the hope is
that process-level solutions will address the problem. The HotLeakage simulator, mentioned in
Chapter 2, takes gate leakage into account, thus giving a more accurate picture for the benefits
of various techniques that target subthreshold leakage.
4 A high dielectric constant, k , means that these materials concentrate the electric field better. When used as
insulators between the plates of a capacitor, a high dielectric constant yields higher capacitance for the same
insulator thickness or, alternatively, the same capacitance but with a thicker insulator layer.