Introduction - Computer Architecture Techniques for Power-Efficiency - page 2

FIGURE 1.1: A history of areal power density trends across decades of computing technologies.
Reproduced from [ 54 ]. Copyright 1999 IEEE.
During the 1980s, the widespread use of bipolar semiconductor technologies and increas-
ingly dense transistor integration led to rapid rises in power dissipation and density. Challenges
in cooling and power delivery were not uncommon. For example, in this time period, IBM and
Cray produced servers and supercomputers that required liquid cooling in order to maintain
their very high performance targets [ 144 , 160 ]. As another example, the BIPS research proces-
sor [ 121 , 120 ] was notable in the early 1990s both due to its high performance and very high
clock rate: 300 MHz, as well as due to its record-setting power dissipation: 115 W.
The shift from bipolar technologies to CMOS technologies brought temporary relief
from power challenges, as shown in the timeline in the early 1990s. CMOS technology had
been in use before the 1990s, and had appealing power behavior in the sense that it primarily
dissipated power only at switching transitions. The complementary gate structure meant that
early gates drew little or no current between transition points, because in a stable state, the
gate has no clear path to ground. (At this point, CMOS technology scaling had not created
significant leakage paths yet.)
During the transition period of the 1980s, many viewed CMOS as too slow for widespread
use in the high-performance microprocessor arena. Though researchers in semiconductor device
technologies explored various alternatives (such as hybrids of bipolar and CMOS), the power
challenges with bipolar, however, became too great to ignore. These challenges drove the
switchover to CMOS, and along the way, technology improvements brought significant gains
to CMOS performance.