Civil Engineering Reference
In-Depth Information
In our approach, for a clock period of 2, we first find the bounding skews.
The FF's at the input and output may not be moved, and therefore, the only
movable FF is FF1, which is assigned a skew of -2 units. The correctness of
this skew value is easy to verify since the only feasible location of FF1 under
P =
2 is two delay units to the right of its current location. Therefore, we find
that by using the concept of restricted mobility,
Since all nodes are fixed, and all the constraints can be dropped, all of the
constraints and variables have been eliminated!
When
P
= 3
units
With the clock period is set to 3 units, the list of constraints is
Circuit constraints
Period constraints
As before, is set as a reference, giving a problem with four variables
(as before) and seven linear constraints (of which three act as simple bounds).
Under our approach, the relocated FF can reside either at the input of gate
b, the output of gate b, or the output of gate c. Therefore, we have
Using these bounds we drop all constraints but
Therefore, we have reduced the problem complexity to two variables, each with
fixed upper and lower bounds and one linear constraint. (Note that upper/lower
bound constraints are typically much easier to handle in LP's than general
linear constraints; in fact, in many cases, upper and lower bounds are actually
helpful in solving the LP.)
