Register Allocation - Introduction to Compiler Construction in a Java World - page 267

Store inserted for V39 at 41 in block [B3]
This gives us the following LIR.
B0
B1
0: LDC[1]$t0
5: MOVE$a0$t1
10:MOVE$t0$t2
11:STORE$t2[stack:0]
B2
15:LDC[0]$t0
20:BRANCH[LE]$t1$t0B4
B3
25:LDC[-1]$t0
26:STORE$t2[stack:0]
30:ADD$t1$t0$t2
31:STORE$t2[stack:1]
34:LOAD[stack:0]$t2
35:MUL$t2$t1$t0
40:MOVE$t0$t2
41:STORE$t2[stack:0]
44:LOAD[stack:1]$t0
45:MOVE$t0$t1
50:BRANCHB2
B4
54:LOAD[stack:0]$t2
55:MOVE$t2$v0
60:RETURN$v0
Physical Register Assignment in the LIR
The nal step in Wimmer's strategy replaces the virtual registers in the LIR with assigned
physical registers. Algorithm 7.8 [Wimmer, 2004] does this register assignment.
Algorithm 7.8 Assign Physical Register Numbers
Input: The version of the control-flow graph g after resolution (Algorithm 7.7)
Output: The same LIR but with virtual registers replaced by physical registers
for block b in g.blocks do
for instruction i in b.instructions do
for virtual register r in i.operands do
// determine new operand
physical register p intervals[r].childAt(i.id).assignedReg
replace r with p in i
end for
if i is a move where the target is the same as the source then
b.instructions.remove(i)
end if
end for
end for
Now the LIR refers only to physical registers and is ready for translation to SPIM.