Impact of Hardware/Software Partitioning and MicroBlaze FPGA Configurations on the Embedded Systems Performances - Complex System Modelling and Control Through Intelligent Soft Computations - page 705

Architecture-Based Design Approach

The Architecture Based Design approach permits an automatic generation of a
synthesized hardware code (VHDL or Verilog), ready to be implemented in FPGA,
from UML diagrams. The rapid prototyping approach should provide a way to
accelerate the hardware language generation. It must satisfy the following features:
(i) Flexibility analysis to produce different results with minimum changes such as
the computing precision. (ii) Accuracy of results. The abstraction level of the
Architecture Based Design approach, compared to a code written with C in the C-
Based design approach and a model described in the Model-Based Design, is very
high. This allows the fl flexibility to add, delete and modify the applications in a short

design time. The ef cient implementation of complex algorithms (such as a light-

weight cryptographic application) in a hardware circuits (FPGA) allows a faster
processing speed (parallelism) and more functionalities to support more advanced
features.

C-Based Design

This approach consists in the automatic generation of hardware code like VHDL or
Verilog, from a C/C++ language, ready to be implemented on FPGAs (Dave et al.
2005 ). Recent development of C-to-HDL tools technology has minimized the gap
between software developer s experience-level, and the expertise needed to produce

hardware applications. Many commercial and academic C-Based Design tools can
be found in the literature: Catapult-C (Mentor Graphics), CoDeveloper

'

, C2H,

™

SPARK. In this study, we chose the CoDeveloper tool to implement complex

™

embedded application using hardware architecture.

2.2 System Level Speci cation

The choice of hardware/software partitioning, using co-design approach, presents a
trade-off among various design metrics such as performance, cost, fl flexibility and

time-to-market pez 2003 ; Joven et al. 2011 ). Several

approaches of hardware/software partitioning are presented. Their classi

(L ó pez-Vallejo and L ó

cation is

based on their input speci cations which is it based on models or languages.

2.2.1 Model Speci cation

Stoy and Zebo ( 1994 ) groups indicate that initial speci ned as

models of components such as a Finite State Machine (FSM), Discrete-Event Sys-
tems, Petri Nets, Data Flow Graphs, Synchronous/Reactive Model, and Heteroge-
neous Models. These models are described in the next sub-sections.

cation can be de