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Fig. 1 FPGA architectures and methodologies design
Recently, designs approaches can be implemented using both hardware/software
architectures using co-design methodology to accelerate the design process. Using
this methodology, designers can incorporate co-processors, hard-cores processors
and soft-cores processors. This decision of integration is taken after a hardware/
software partitioning step. Hardware/Software partitioning is usually related to
physical constraints (computing time, energy consumption, level of integration,
area utilization) and economic constraints (cost,
flexibility, design time and Time-
To-Market) embedded systems constraints, as described in Table 1 .
Recently, Recon
fl
gurable devices, such as FPGAs, become highly appealing
circuits for co-design methodology as they provide
flexibility and ability to easily
implement complex embedded applications. Using co-design methodologies,
designers permit the integration of both hardware and software architectures into
FPGA (Kalomiros and Lygouras 2008 ). Xilinx proposes its own co-design meth-
odology using Xilinx EDK (Integrated Development Kit) environment. EDK
includes both an integrated development environment (IDE) named Xilinx Platform
Studio (XPS) and Software Design Kit (SDK). XPS tool allows the implementation
on hardware architecture and the creation of a Microprocessor Hardware Specifi-
fl
-
cation (MHS)
file. SDK tool permit the implementation of software architecture and
the creation of the Microprocessor Software Speci
cation (MSS)
file. The MHS
le
de
nes the embedded system processor, architecture and peripherals. The MSS
le
de
nes the library customization parameters for peripherals, the processor cus-
tomization parameters, the standard I/O devices, the interrupt handler routines, etc.
Figure 2 depicts the co-design
fl
flow of Xilinx EDK tool.
2.1.2 Hardware/Software Partitioning Approaches
FPGAs present powerful circuits for prototyping embedded system applications,
supporting both software and hardware architectures. The choice of architecture is
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