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introduces our new hardware/software partitioning approach on a complex secure
lightweight cryptographic algorithm. This work can contribute to enforce the
security of SCADA (Supervision Control and Data Acquisition) systems and the
DSS (Digital Signal Standard) without compromising the cost and the performance
of the
final system.
1 Introduction
Embedded systems are now present in practically all domestic and industrial sys-
tems (appliances and applications) such as cellular telephones, personal digital
assistants (PDAs), digital cameras, Global Positioning System (GPS) receivers,
defense systems and security applications. The increased complexities of embedded
systems and their real-time operation
s constraints allow semiconductor markets to
build other solutions for processing. Traditionally, embedded systems were
designed and implemented using Microprocessors (MP), Microcontrollers (MCUs),
Digital Signal Processors (DSPs), Application-Speci
'
c Integrated Circuits (ASICs)
and FPGAs. Due to their advantages, FPGAs have substituted DSPs in different
applications such as motor controllers (Arulmozhiyal 2012 ; Xiaoyin and Dong
2007 ) which are widely used in industrial applications, image processing (Kikuchi
and Morioka 2012 ), wireless (Jing-Jie and Rui 2011 ; Nasreddine et al. 2010 ),
automotive and aerospace systems. Continuing increases in FPGA performance,
capability and architectural features are enabling more embedded systems designs
to be implemented using FPGAs. Additionally, FPGAs costs are decreasing, for
less than $12, allowing designers to incorporate FPGAs circuits with one million
equivalent gates. This made the implementation of Programmable System-On-Chip
(SoPCs) possible what also allowed this implementation their pipeline ability,
intrinsic parallelism and
flexible architecture (Jianzhuang et al. 2008 ). FPGAs offer
a faster processing speed, a lower-cost solution and more functionalities to support
more innovative characteristics.
Nevertheless, the increasing complexity of algorithms and the rising integration
scale on FPGAs triggered designers into drastically improving design methodolo-
gies. In addition, the effort to design complex applications on FPGA is generally
much more complicated than impelementing them on programmable processors.
The real challenge, as far as the embedded systems designers are concerned, is
how to increase performances (execution time, area and energy consumption) of
complex systems and reduce their complexity, and re
fl
nement time.
Many interesting design methodologies are presented. Some designers have
based their methodologies on reducing development time to implement complex
embedded systems. Among the many approaches that have been adapted there is
first the automatic transformation of the behavioral system description into struc-
tural netlist system components using high level input language such as SpecC
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