Satellite Signal Acquisition, Tracking, and Data Demodulation - Understanding GPS: Principles and Applications - page 209

future code clock that corresponds to the computation of G, the buffer contents
would be parallel transferred into the C/A code generator. This instantly aligns the
replica code generator to the C/A code portion of the code accumulator. The ambi-
guity in the code accumulator must be removed by reading the handover word and
placing it into the code accumulator at the correct epoch. This is described later.

P Code Setup
Figure 5.31 illustrates the high-level block diagram for the P code setup. (Details of
P code generation were discussed in Chapter 4.) Recall from Chapter 4 that the P
code generator contains four 12-bit linear feedback shift registers, called X1A, X1B,
X2A, and X2B [2]. The PRN phase states of these four registers are the same for
every SV PRN number at the same GPS time of the week. The unique PRN code is
determined by the delay of the X2 output. Each of the four shift registers must have
a corresponding 12-bit code setter. The P code setup is similar to the C/A code
setup, but involves a much more complex code setter process, since, in general, all
four shift registers must be reset at different time phases. There are two unusual
code setter timing patterns that involve additional delays in the X1B, X2A, and X2B
shift registers. The first occurs at the end of every X1 and X2 cycle. The second
occurs at the end of the X2 cycle at the end of the GPS week.
Table 5.7 shows the count states for the first cycle of the GPS week for the four
registers, starting with the 3,749th and 3,750th cycles of the X1A and X2A regis-
ters. After each cycle of X1A and X1B, the X1B epoch advances 1 chip ahead of
X1A. The same pattern occurs between X2A and X2B. For the P code phases shown
in Table 5.7, the X1 and X2 counts match during the first X1 cycle of the week (i.e.,
the X1A and X2A registers and the X1B and X2B registers are aligned to each other

Table 5.7 Count States for 3,749th and 3,750th Cycles of X1A in First X1 Cycle of Week

Z X1 X1A X1B D1B X2 X2A D2A X2B D2B

0 15340563 3747 4092 0 15340563 3747 0 4092 0

0 15340564 3748 0 343 15340564 3748 0 0 380

· · · · · · · · · ·

0 15340907 4091 343 343 15340907 4091 0 343 380

0 15340908 0 344 343 15340908 0 37 344 380

· · · · · · · · · ·

0 15344655 3747 4091 343 15344655 3747 37 4091 380

0 15344656 3748 4092 343 15344656 3748 37 4092 380

0 15344657 3749 4092 342 15344657 3749 37 4092 379

· · · · · · · · · ·

0 15344998 4090 4092 1 15344998 4090 37 4092 38

0 15344999 4091 4092 0 15344999 4091 37 4092 37

1 0 0 0 0 15345000 4091 36 4092 36

· · · · · · · · · ·

1 35 35 35 0 15345035 4091 1 4092 1

1 36 36 36 0 15345036 4091 0 4092 0

1 37 37 37 0 0 0 0 0 0

Note: These count states are not the PRN code states contained in the shift registers.