Global Positioning System Reference
In-Depth Information
Q
φ−φ
2
1
t 1
t 2
A 2
A 1
Q PS1
Q
PS2
I
I PS1
I PS2
A 1
A 2
φ−φ
2
1
True frequency error
t
21
No frequency ambiguity
due to data bit transition
(unless samples are split)
Figure 5.12 I , Q phasor diagram depicting true frequency error between replica and incoming
carrier frequency.
5.4
Code Tracking Loops
Figure 5.13 shows a block diagram of a GPS receiver code tracking loop. The design
of the programmable predetection integrators, the code loop discriminator, and the
code loop filter characterizes the receiver code tracking loop. These three functions
determine the most important two performance characteristics of the receiver code
loop design: the code loop thermal noise error and the maximum LOS dynamic
stress threshold. Even though the carrier tracking loop is the weak link in terms of
the receiver's dynamic stress threshold, it would be disastrous to attempt to aid the
SIN
replica
carrier
I ES
Integrate
and dump
Integrate
and dump
Integrate
and dump
Integrate
and dump
Integrate
and dump
Integrate
and dump
E
I PS
P
P
I LS
Digital IF
I
I
Numerical
controlled
oscillator
Code loop
discriminator
Code
loop filter
L
L
Q
E
Q ES
Q PS
P
P
Code
NCO
bias
Clock f
Carrier
aiding
c
COS
replica
carrier
Q
Q LS
L
E
I and Q used only for dot product code
loop discriminator. These are always used
in the carrier loop discriminator.
Replica code phase spacing between early (E)
and late (L) outputs is D chips where D is
typically 1 or less.
Notes:
1.
P
P
L
L
PS
PS
Code
generator
C
D
D
L
L
2-bit shift register
2.
C
2f
/ D
co
f
co
Figure 5.13
Generic GPS receiver code tracking loop block diagram.
 
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