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Control = 0/1
Input Argument A
Figure 4.4 The Add
/
Sub circuit
b
3
a
3
b
2
a
2
b
1
a
1
b
0
a
0
P
2
P
3
G
3
G
2
P
1
G
1
P
0
G
0
c
- 1
AND-OR
circuit for
realizing c
2
AND-OR circuit for
realizing c
3
c
3
c
2
c
1
c
0
P
3
P
2
P
1
P
0
s
3
s
2
s
1
s
0
Figure 4.5 A 4-bit CLA adder structure
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