Instruction Set Architecture and Design - Fundamentals of Computer Organization and Architecture - page 21

TABLE 2.1 Instruction Classification

Instruction class Example

Three-address ADD R 1 ,R 2 ,R 3

ADD A,B,C

Two-address ADD R 1 ,R 2

ADD A,B

One-and-half-address ADD B,R 1

One-address ADD R 1

Zero-address ADD (SP) þ ,(SP)

2.2.1. Immediate Mode

According to this addressing mode, the value of the operand is (immediately) avail-
able in the instruction itself. Consider, for example, the case of loading the decimal
value 1000 into a register R i . This operation can be performed using an instruction
such as the following: LOAD #1000, R i . In this instruction, the operation to be per-
formed is to load a value into a register. The source operand is (immediately) given
as 1000, and the destination is the register R i . It should be noted that in order to indi-
cate that the value 1000 mentioned in the instruction is the operand itself and not
its address (immediate mode), it is customary to prefix the operand by the special
character (#). As can be seen the use of the immediate addressing mode is simple.
The use of immediate addressing leads to poor programming practice. This is
because a change in the value of an operand requires a change in every instruction
that uses the immediate value of such an operand. A more flexible addressing mode
is explained below.

2.2.2. Direct (Absolute) Mode

According to this addressing mode, the address of the memory location that holds
the operand is included in the instruction. Consider, for example, the case of loading
the value of the operand stored in memory location 1000 into register R i . This oper-
ation can be performed using an instruction such as LOAD 1000, R i . In this instruc-
tion, the source operand is the value stored in the memory location whose address is
1000, and the destination is the register R i . Note that the value 1000 is not prefixed
with any special characters, indicating that it is the (direct or absolute) address of the
source operand. Figure 2.6 shows an illustration of the direct addressing mode. For

Memory

Operation Address

Operand

Figure 2.6 Illustration of the direct addressing mode