Instruction Set Architecture and Design - Fundamentals of Computer Organization and Architecture - page 15

& CHAPTER 2

Instruction Set Architecture
and Design

In this chapter, we consider the basic principles involved in instruction set architecture
and design. Our discussion starts with a consideration of memory locations and
addresses. We present an abstract model of the main memory in which it is considered
as a sequence of cells each capable of storing n bits. We then address the issue of stor-
ing and retrieving information into and from the memory. The information stored
and or retrieved from the memory needs to be addressed. A discussion on a

number of different ways to address memory locations (addressing modes) is the
next topic to be discussed in the chapter. A program consists of a number of instruc-
tions that have to be accessed in a certain order. That motivates us to explain the issue
of instruction execution and sequencing in some detail. We then show the application
of the presented addressing modes and instruction characteristics in writing sample
segment codes for performing a number of simple programming tasks.
A unique characteristic of computer memory is that it should be organized in a hier-
archy. In such hierarchy, larger and slower memories are used to supplement smaller
and faster ones. A typical memory hierarchy starts with a small, expensive, and rela-
tively fast module, called the cache. The cache is followed in the hierarchy by a larger,
less expensive, and relatively slow main memory part. Cache and main memory are
built using semiconductor material. They are followed in the hierarchy by larger,
less expensive, and far slower magnetic memories that consist of the (hard) disk
and the tape. The characteristics and factors influencing the success of the memory
hierarchy of a computer are discussed in detail in Chapters 6 and 7. Our concentration
in this chapter is on the (main) memory from the programmer's point of view. In par-
ticular, we focus on the way information is stored in and retrieved out of the memory.

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2.1. MEMORY LOCATIONS AND OPERATIONS

The (main) memory can be modeled as an array of millions of adjacent cells, each
capable of storing a binary digit (bit), having value of 1 or 0. These cells are