Introduction to Multiprocessors - Fundamentals of Computer Organization and Architecture - page 249

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Figure 11.10 Three examples of shared-memory architectures. (a) UMA, (b) COMA,
(c) NUMA

Figure 11.10 shows typical organization for the abovementioned three shared-
memory architectures. In the UMA system, a shared memory is accessible by all
processors through an interconnection network in the same way a single processor
accesses its memory. Therefore, all processors have equal access time to any
memory location. The interconnection network used in the UMA can be a single
bus, multiple bus, a crossbar, or a multiport memory.
In the NUMA system, each processor has part of the shared memory attached.
The memory has a single address space. Therefore, any processor could access
any memory location directly using its real address. However, the access time to
modules depends on the distance to the processor. This results in a nonuniform
memory access time. A number of architectures are used to interconnect processors
to memory modules in a NUMA. Among these are the tree and the hierarchical bus
networks (see Chapter 2 of our topic on Advanced Computer Architecture and
Parallel Processing, see reference list).
Similar to the NUMA, each processor has part of the shared memory in the
COMA. However, in this case the shared memory consists of cache memory. A
COMA system requires that data be migrated to the processor requesting it.

11.4.2. Message-Passing Organization

Message passing represents an alternative method for communication and move-
ment of data among multiprocessors. Local, rather than global, memories are used
to communicate messages among processors. A message is defined as a block of
related information that travels among processors over direct links. There exist a
number of models for message passing. Examples of message-passing systems
include the cosmic cube, workstation cluster, and the transputer.
The introduction of the transputer system T212 in 1983 announced the birth of
the first message-passing multiprocessor. Subsequently the T414 was announced
in 1985, while Inmos introduced the VISI transputer processor in 1986. Two
subsequent transputer products, the T800 (1988) and T9000 (1990), have been