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nxn
IP
1: n
IP
nxn
DP
DP
1: n
IM
M
D
M
IM
(
a
)
(
b
)
nxn
nxn
DP
DP
IP
IP
D
M
IM
D
M
IM
(
c
)
(
d
)
Figure 11.6 Example connection classes. (a) Array 1 class, (b) array 2 class, (c) tightly
coupled multiprocessor, (d) loosely coupled multiprocessor
(1) lacks the inclusion of operational aspects such as pipelining and (2) has difficulty
in predicting the relative power of machines belonging to the same class without
explicit knowledge of the interconnection scheme used in that class.
Multiple processor systems can be further classified as tightly coupled versus
loosely coupled. In a tightly coupled system, all processors can equally access a
global memory. In addition, each processor may also have its own local or cache
memory. In a loosely coupled system, the memory is divided among processors
such that each processor will have its own memory attached to it. However, pro-
cessors still share the same memory address space. Any processor can directly
access any remote memory. Examples of tightly coupled multiple processors include
the CMU C.mmp, Encore Computer Multimax, and the Sequent Corp. Balance
series. Examples of loosely coupled multiple processors include CMU Cm
, the
BBN Butterfly, and the IBM RP3.
11.3. SIMD SCHEMES
Recall that Flynn's classification results in four basic architectures. Among those,
the SIMD and the MIMD are frequently used in constructing parallel architectures.
In this section, we will provide basic information on the SIMD paradigm. It is
important at the outset to indicate that SIMD are mostly designed to exploit the
inherent parallelism encountered in matrix (array) operations, which are required
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