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limit, the dependence analysis and scheduling must be done by the compiler. This is
the basis for the VLIW approach.
Very Long Instruction Word (VLIW)
In this approach, the compiler performs
dependency analysis and determines the appropriate groupings
scheduling of oper-
ations. Operations that can be performed simultaneously are grouped into a very
long instruction word (VLIW). Therefore, the instruction word is made long
enough in order to accommodate the maximum possible degree of parallelism.
For example, the IBM DAISY machine has an instruction word that is eight oper-
ation long, called 8-issue machine.
In VLIW, resource binding can be done by devoting each field of an instruction
word to one and only one functional unit. However, this arrangement will lead to a
limit on the mix of instructions that can be issued per cycle. A more flexible
approach is to allow a given instruction field to be occupied by different kinds of
operations. For example, the Philips TriMedia machine, a 5-issue machine, has 27
functional units mapped to a 5-issue slot. In the IBM DAISY, every instruction
implements a multiway path selection scheme. In this case, the first 72 bits of the
VLIW is called the header and contain information on the tree form, condition
tests, and branch targets. The header is followed by eight 23-bit parcels, each encod-
ing an operation. In order to solve the problem of providing operands to a large
number of functional units, the IBM DAISY keeps eight identical copies of the
same register file, one for each of the eight functional units.
/
9.5. ARITHMETIC PIPELINE
The principles used in instruction pipelining can be used in order to improve the per-
formance of computers in performing arithmetic operations such as add, subtract,
and multiply. In this case, these principles will be used to realize the arithmetic cir-
cuits inside the ALU. In this section, we will elaborate on the use of arithmetic pipe-
line as a means to speed up arithmetic operations. We will start with fixed-point
arithmetic operations and then discuss floating-point operations.
9.5.1. Fixed-Point Arithmetic Pipelines
The basic fixed point arithmetic operation performed inside the ALU is the addition
of two n-bit operands A
¼
a
n
2
1
a
n
2
2
a
2
a
1
a
0
and B
¼
b
n
2
1
b
n
2
2
b
2
b
1
b
0
.
Addition of these two operands can be performed using a number of techniques.
These techniques differ in basically two attributes: degree of complexity and
achieved speed. These two attributes are somewhat contradictory; that is, a simple
realization may lead to a slower circuit while a complex realization may lead to a
faster circuit. Consider, for example, the carry ripple through (CRTA) and a carry
look-ahead (CLAA) adders. The CRTA is simple, but slower, while the CLAA is
complex, but faster.
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