Input–Output Design and Organization - Fundamentals of Computer Organization and Architecture - page 168

performed. For example, to serve the first interrupt, STATUS 1 will be pushed onto
the stack. Upon receiving the second interrupt, STATUS 2 will be pushed onto the
stack. Upon serving the second interrupt, STATUS 2 will be popped out of the stack
and upon serving the first interrupt, STATUS 1 will be popped out of the stack.
It is possible to have the interrupting device identify itself to the processor by
sending a code following the interrupt request. The code sent by a given I O

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device can represent its I O address or the memory address location of the start

of the ISR for that device. This scheme is called vectored interrupt.

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8.3.1. Interrupt Hardware

In the above discussion, we have assumed that the processor has recognized the
occurrence of an interrupt before proceeding to serve it. Computers are provided
with interrupt hardware capability in the form of specialized interrupt lines to the
processor. These lines are used to send interrupt signals to the processor. In the
case of I

O device. The processor should be pro-
vided with a mechanism that enables it to handle simultaneous interrupt requests
and to recognize the interrupting device. Two basic schemes can be implemented
to achieve this task. The first scheme is called daisy chain bus arbitration
(DCBA) and the second is called independent source bus arbitration (ISBA).
According to the DCBA (see Fig. 8.6a ), I

/ O, there exists more than one I /

O devices present their interrupt
requests to the interrupt request line INR (similar to the polling arrangement).
Upon recognizing the arrival of an interrupt request, the processor, through a
daisy chained grant line (GL), sends its grant to the requesting device to start com-
munication with the processor. The GL goes through all devices starting from the
first device nearer to the processor and going to the next device and so on until it
reaches the last device (Device #N). If Device #1 has put a request, then it will
hold the grant signal and start communication with the processor. If, on the other
hand, Device #1 has no interrupt request, it will pass the grant signal to device
#2, which will repeat the same procedure, and so on. In the case of multiple requests,
the DCBA arrangement gives highest priority to the device physically nearer to the
processor. The furthest device from the processor has the lowest priority.
According to the ISBA (see Fig. 8.6b), each I

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O device has its own interrupt request
line, through which it can send its interrupt request, independent of the other devices.
Similarly, each I

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O device has its own grant line, through which it receives the grant
signal for its request such that it can start communicating with the processor. I

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O
device priority in the ISBA does not depend on the device location. A priority arbitra-
tion circuitry is needed in order to deal with simultaneous interrupt requests.

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8.3.2. Interrupt in Operating Systems

When an interrupt occurs, the operating system gains control. The operating
system saves the state of the interrupted process, analyzes the interrupt, and
passes control to the appropriate routine to handle the interrupt. There are several