Memory System Design II - Fundamentals of Computer Organization and Architecture - page 147

TLB in the hope that a match is found. A hit in the TLB will result in the generation
of the physical address of the word requested by the processor, thus saving the extra
main memory access required to access the page table. It should be noted that a miss
on the TLB is not equivalent to a page fault. Figure 7.12 illustrates the use of the
TLB in the virtual address translation process. The typical size of a TLB is in the
range of 16 to 64 entries. With this small TLB size, a hit ratio of more than 90%
is always possible. Owing to its limited size, the search in the TLB is done associa-
tively, thus reducing the required search time.
To illustrate the effectiveness of the use of a TLB, let us consider the case of
using a TLB in a virtual memory system having the following specifications.

Number of entries in the TLB ¼ 16 Associative search time in TLB ¼ 10 ns

Main memory access time ¼ 50 ns TLB hit ratio ¼ 0.9

The average access time 0.9(10 þ 50) þ 0.1(10 þ 2 * 50) 0.9 * 60 þ

¼ ¼

0.1 * 110 65 ns. This is to be compared to the 100 ns access time needed in the

absence of the TLB. It should be noted that for simplicity, we overlooked the exist-
ence of the cache in the above illustration.
It is clear from the above discussion that as more requests for items that do not
exist in the main memory (page faults) occur, more pages would have to be brought
from the hard disk to the main memory. This will eventually lead to a totally filled
main memory. The arrival of any new page from the hard disk to a totally full main
memory should promote the following question: Which main memory page should
be removed (replaced) in order to make room for the incoming page(s)? Replace-
ment algorithms (policies) are explained next.

¼

Figure 7.12 Use of the TLB in virtual address translation