Wire-Speed Hardware-Assisted Traffic Filtering with Mainstream Network Adapters - Advances in Network-Embedded Management and Applications - page 77

With the advent of multi-core systems and multi-queue adapters, PF_RING
has been extended with support of virtual RX queues [12], that enable specific
plugins/user space applications to receive traffic from specific RX queues.
The PF_RING kernel infrastructure is responsible to exploit facilities such as
RSS for balancing and assigning packets to cores while queue information is
preserved in received packets.
In summary, PF_RING has become an advanced framework that thanks to its
rule-based mechanism, has been capable to simplify the engineering of
modular applications and not just accelerate packet capture. However, the
rule-based mechanism has been completely implemented in software, and
therefore, it is inefficient at very high speed such as 10 Gbit.
Last year Intel introduced X520, a 10 Gbit card based on the new 82599
ethernet controller [13]. What makes this adapter interesting for PF_RING, is
the ability to support in hardware dynamically configurable flow affinity
filters for classifying, load balancing and dispatching traffic flows to
processor cores. The filtering mechanisms introduced by 82599 can be seen as
a fine-grained RSS that allows selected flows to be classified and dispatched
towards specific cores based on configurable packet filters and not on RSS
hashing.

Fig. 2. Integrating 82599 with PF_RING .

The availability of this affinity facility in commodity adapters has been the
natural solution to address performance issues of PF_RING at 10 Gbit.
Exploiting the flow affinity filters is indeed attractive for:
• leveraging hardware facilities for dispatching packets across PF_RING

plugins enabled on selected RX queues;

• dropping unwanted packets in hardware inside the NIC before they hit the

driver.