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different interfaces, possibly tailored to the given application. Unlike for
network processors, where hardware accelerators are given, we can design
and implement custom hardware accelerators in order to achieve best
performance. There are several hardware accelerators that are generic, like
binary/ternary CAM tables, queue managers etc., but accelerators can be
tailored by an optimization process. In our approach we consider that
processors can reach the hardware accelerators through a simple and fast
interface, like port I/O operation or memory operation to a very specific area.
The optimal separation of software/accelerators/hardware however is an
optimization “knob” that requires an iterative approach to select the optimal
parameters.
A further gain for the hardware acceleration is the decreased power
requirement, since hardware processing has lower cost form the point of view
of energy consumption.
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