Information Technology Reference
In-Depth Information
Fig. 2. Internal structure of the SCALOPES C-board and the two-way
communication of the FPGAs
There is an additional interface designed for configuration and
maintenance. The FPGAs can be reprogrammed during operation, and the
running IP-core can be controlled/changed through a 10/100 Mbps Ethernet
interface connected to the COM express PC.
3.3
Low Power Design
During the development of the C-board, one of the main, higher goals was to
create a device of low power consumption. Depending on the network
configuration, the used application and the traffic volume the power
consumption of the C-board becomes significantly lower in comparison to
systems that do not use sophisticated power control. As a static requirement, it
can be reached by using low-power electronic elements. The operating power
 
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