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7. Ghosh, S., Bhunia, S., Raychowdhury, A., Roy, K.: A novel delay fault test-
ing methodology using low-overhead built-in delay sensor. IEEE Transactions on
Computer-Aided Design of Integrated Circuits and Systems 25(12), 2934-2943
(2006)
8. Yang, K., Cheng, K.-T., Wang, L.-C.: Trangen: a sat-based atpg for path-oriented
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9. Perform the SPICE Simulation of ISCAS85 Benchmark Circuits for Research,
http://www.ece.uic.edu/ ~ masud/iscas2spice.htm
 
 
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