An Area Efficient Wide Range On-Chip Delay Measurement Architecture - VLSI Design and Test - page 51

BUF

PDE_U

Upper delay chain

STOP(i+1)

STOPi

Q(i+1)

Qi=1 Qi

Data

Data

Q(i+1)=0

Qi

DFF

DFF

Clk SCLK

Clk

Qi

Q(i+1)

STARTi

START(i+1)

Lower delay chain

BUF

PDE_D

Dt(i+1)

Dti

Fig. 2. Qi=1 shows that STOPi signal transition occurs earlier than STARTi sig-
nal transition. Q(i+1)=0 indicates that STARTi signal transition occurs earlier than
STOPi signal transition.

The delay range is defined as modulus of the difference between the delay
produced by upper delay chain PDE(PDE U) and lower delay chain PDE(PDE L
or PDE D).

delay range = | upper PDE delay − lower PDE delay | (1)

When a slow moving signal in a delay chain crosses a fast moving signal due to
different delays applied to these signals, a crossover is said to have taken place.
Crossover is identified by different output of DFFs in adjacent delay stages.
In [6], the signal passing through delay chain connected to the input of PUT
is either delayed more or given an equal delay compared to the delay given to
signal passing through the delay chain connected to output of PUT. Such a delay
mechanism require buffers of two different sizes in delay chain of each stage. In
the proposed approach, the signal transition which occurs earlier is delayed more
than a slow signal transition, irrespective of whether the signal transition passes
through upper delay chain or lower delay chain. This reduces the number of
required buffers in a delay stage as compared to [6].
Number of delay stages in the proposed architecture is reduced by employing
high delay range stages, till a first crossover takes place. After first crossover,
when two signals crosses each other in a delay stage, the delay range of the
subsequent stages is reduced and again the signal transition which occurs earlier
is given more delay as compared to the delay given to signal with slow transition.
Path delay measurement with high precision is completed after three crossovers.
We now perform analysis of time difference between the signals at delay stages
during crossovers. In Figure 3 , t1, t2 represents time at which signal transition
takes place. The transition that occurs earlier is given a delay which is D1 more
than the delay given to other signal transition. D1 is the delay range prior to
first crossover. Till the first crossover the STARTi of an i th stage is given D1
more delay than the delay given to STOPi signal.
Suppose first crossover occurs after N1 stages, then the time relationship
between the input signals in stage (N1+1) is as shown in Figure 3 . In an i th